R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 338

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 Bus Controller (BSC)
9.11.4
Table 9.26 shows the pins used for the SDRAM interface.
Since a CS pin functions as an input after a reset, set the bit in PFCR to 1 to output the CS signal.
For details, see section 13, I/O Ports.
To enable the SDRAM interface, select the appropriate MCU operating mode. For details, see
section 3, MCU Operating Modes.
Table 9.26 I/O Pins for SDRAM Interface
Rev. 2.00 Oct. 21, 2009 Page 304 of 1454
REJ09B0498-0200
Pin
RAS
CAS
WE
OE/CKE
LLCAS/
DQMLU
LLCAS/
DQMLL
A17 to A0
D15 to D0
PB7
CS2
I/O Pins Used for DRAM Interface
DRAM
Selected
RAS
CAS
WE
CKE
DQMLU
DQMLL
A17 to A0
D15 to D0
SDRAMφ
CS
Name
Row address
strobe
Column address
strobe
Write enable
Clock enable
Lower-upper data
mask enable
Lower-lower data
mask enable
Address pin
Data pin
Clock
Chip select
Output
Output
Output
Output
Output
Output
output
Output
Output
I/O
Output
Input/
Function
Row address strobe when the SDRAM
space is specified as area 2
Column address strobe when the
SDRAM space is specified as area 2
Write enable signal for accessing the
SDRAM interface
Clock enable signal when the SDRAM
space is specified as area 2.
Upper data mask enable when the 16-
bit SDRAM space is accessed
•
•
Multiplexed row/column-address output
pin
Data input/output pin
SDRAM clock
Strobe signal indicating that SDRAM is
selected
Lower data mask enable when the
16-bit SDRAM space is accessed
Data mask enable when the 8-bit
SDRAM is accessed