R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1231

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
4. Bit rate
When the new bit rate is selectable, the rate will be set in the register after sending ACK in
response. The host will send an ACK with the new bit rate for confirmation and the boot program
will response with that rate.
Confirmation
• Confirmation, H'06, (one byte): Confirmation of a new bit rate
Response
• Response, H'06, (one byte): Response to confirmation of a new bit rate
The sequence of new bit-rate selection is shown in figure 25.26.
To facilitate error checking, the value (n) of clock select (CKS) in the serial mode register
(SMR), and the value (N) in the bit rate register (BRR), which are found from the peripheral
operating clock frequency (φ) and bit rate (B), are used to calculate the error rate to ensure that
it is less than 4%. If the error is more than 4%, a bit rate error is generated. The error is
calculated using the following expression:
Error (%) = {[
Setting a new bit rate
Waiting for one-bit period
at the specified bit rate
H'06
H'06
Host
(N + 1) × B × 64 × 2
Figure 25.26 New Bit-Rate Selection Sequence
φ × 10
H'06 (ACK) with the new bit rate
H'06 (ACK) with the new bit rate
6
Setting a new bit rate
(2×n − 1)
H'06 (ACK)
] − 1} × 100
Rev. 2.00 Oct. 21, 2009 Page 1197 of 1454
Setting a new bit rate
Section 25 Flash Memory
Boot program
REJ09B0498-0200

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