R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 222

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 Bus Controller (BSC)
Rev. 2.00 Oct. 21, 2009 Page 188 of 1454
REJ09B0498-0200
Bit
14
13
12
11
10
9
8
Bit Name
W32
W31
W30
⎯
W22
W21
W20
Initial
Value
1
1
1
0
1
1
1
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
10: SDRAM with a CAS latency of 3 is connected.
Description
Area 3 Wait Control 2 to 0
These bits select the number of program wait cycles
when accessing area 3 while bit AST3 in ASTCR is 1.
000: Program wait cycle not inserted
001: 1 program wait cycle inserted
010: 2 program wait cycles inserted
011: 3 program wait cycles inserted
100: 4 program wait cycles inserted
101: 5 program wait cycles inserted
110: 6 program wait cycles inserted
111: 7 program wait cycles inserted
Reserved
This is a read-only bit and cannot be modified.
Area 2 Wait Control 2 to 0
These bits select the number of program wait cycles
when accessing area 2 while bit AST2 in ASTCR is 1.
When SDRAM is connected, the CAS latency is
specified. At this time, W22 is ignored. The CAS latency
can be specified even if the wait cycle insertion is
disabled by ASTCR.
Selection of number of program wait cycles:
000: Program wait cycle not inserted
001: 1 program wait cycle inserted
010: 2 program wait cycles inserted
011: 3 program wait cycles inserted
100: 4 program wait cycles inserted
101: 5 program wait cycles inserted
110: 6 program wait cycles inserted
111: 7 program wait cycles inserted
Setting of CAS latency (W22 is ignored.):
00: Setting prohibited
01: SDRAM with a CAS latency of 2 is connected.
11: SDRAM with a CAS latency of 4 is connected.