R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1077

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21.4
21.4.1
Figure 21.3 shows the I
following a start condition always consists of 8 bits.
(a) I
(b) I
[Legend]
S:
SLA:
R/W:
A:
DATA: Transferred data
P:
SDA
SCL
2
2
C bus format
C bus format (start condition retransmission)
S
1
S
1
S
Start condition. The master device drives SDA from high to low while SCL is high.
Slave address
Indicates the direction of data transfer; from the slave device to the master device when
R/W is 1, or from the master device to the slave device when R/W is 0.
Acknowledge. The receive device drives SDA low.
Stop condition. The master device drives SDA from low to high while SCL is high.
Operation
I
2
C Bus Format
SLA
SLA
7
7
SLA
1-7
1
1
R/W
R/W
1
1
2
C bus formats. Figure 21.4 shows the I
R/W
8
A
A
1
1
A
9
DATA
DATA
Figure 21.3 I
Figure 21.4 I
n1
n
m1
A
1
1-7
A/A
m
DATA
1
2
C Bus Formats
2
C Bus Timing
S
1
8
n1 and n2: Transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: Transfer frame count (m1 and m2 ≥ 1)
SLA
A/A
1
7
9
A
Rev. 2.00 Oct. 21, 2009 Page 1043 of 1454
2
C bus timing. The first frame
P
1
1
R/W
Section 21 I
1
m: Transfer frame count
(m ≥ 1)
n: Transfer bit count
(n = 1 to 8)
1-7
DATA
A
1
2
DATA
C Bus Interface 2 (IIC2)
8
n2
REJ09B0498-0200
m2
A
9
A/A
1
P
1
P