R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 528

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 EXDMA Controller (EXDMAC)
When transfer starts, the offset value is added to the transfer source address and the data is
transferred. The data is aligned in the order of transfer in the transfer destination. After up to data
4 is transferred, the EXDMAC assumes that a repeat-size transfer completed, and restores the
transfer source address to the transfer start address (address of transfer source data 1). At the same
time, a repeat size end interrupt is requested. This interrupt request aborts the transfer temporarily.
Overwrite the EDSAR value to the data 5 address by accessing the I/O register via the CPU. (For
longword transfer, add 4 to the address of data 1.) When the DTE bit in EDMDR is set to 1,
transfer is resumed from the state in which the transfer is aborted. The transfer source data is XY-
converted and transferred to the transfer destination by repeating the above processing.
Figure 11.20 shows the XY conversion flow.
Rev. 2.00 Oct. 21, 2009 Page 494 of 1454
REJ09B0498-0200
Figure 11.20 Flow of XY Conversion Combining Repeat Transfer Mode and Offset
Set address and transfer count
Enable repeat cancel interrupt
Transfer request accepted
Set repeat transfer mode
repeat size decremented
: User side
Transfer counter and
Transfer count = 0
Set DTE bit to 1
Data transfer
Start
End
Yes
No
:EXDMAC side
Addition
Transfer source address restored
Set transfer source address + 4
Interrupt requested
End of repeat size
Repeat size = 0
Yes
(For longword transfer)
No