R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1215

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 25.21 shows an example of the procedure to program the tuned data in block EB0 of the
user MAT.
1. After tuning program data is completed, clear the RAMS bit in RAMER to 0 to cancel the
2. Transfer the user-created procedure program to the on-chip RAM.
3. Start the procedure program and download the on-chip program to the on-chip RAM. The start
4. When block EB0 of the user MAT has not been erased, the programming program must be
Note: Setting the RAMS bit to 1 makes all the blocks of the user MAT enter the
H'7FFFF*
Notes:
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
overlaid RAM.
address of the download destination should be specified by FTDAR so that the tuned data area
does not overlay the download area.
downloaded after block EB0 is erased. Specify the tuned data saved in the FMPAR and
FMPDR parameters and then execute programming.
programming/erasing protection state (emulation protection state) regardless of the setting
of the RAM2 to RAM0 bits. Under this condition, the on-chip program cannot be
downloaded. When data is to be actually programmed and erased, clear the RAMS bit
to 0.
2
1. EB8 to EB13 in the H8SX/1662.
2. H'05FFFF in the H8SX/1662.
Flash memory
EB8 to EB15*
user MAT
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
Figure 25.21 Programming Tuned Data (H8SX/1665)
1
(1) Exit RAM emulation mode.
(2) Transfer user-created programming/erasing procedure program.
(3) Download the on-chip programming/erasing program to the area
(4) Program after erasing, if necessary.
Area for programming/
Tuned data area
erasing program etc.
specified by FTDAR. FTDAR setting should avoid the tuned data area.
Download area
Specified by FTDAR
H'FFA000
H'FFAFFF
H'FFB000
H'FFBFFF
Rev. 2.00 Oct. 21, 2009 Page 1181 of 1454
Section 25 Flash Memory
REJ09B0498-0200