HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 408

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Table 143.
Intel
Datasheet
408
Ball No.
AA10
AA11
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y31
Y32
Y33
Y34
Y35
Y36
Y37
Y38
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9
Y5
Y6
Y7
Y8
Y9
®
5100 Memory Controller Hub Chipset
CH0_DQSN[16]
CH0_DQSP[16]
CH0_DQSP[7]
CH0_DQSN[7]
Signal Name
Intel
PEWIDTH[1]
CH0_DQ[58]
CH0_DQ[63]
CH0_DQ[57]
CH0_DQ[56]
CH0_DQ[50]
CH0_DQ[61]
PEWIDTH[0]
PE0TN[0]
PE0RN[0]
PE0TN[1]
PE0RN[3]
PE0TN[3]
PE0TP[0]
PE0RP[0]
PE0TP[1]
PE0RP[3]
PE0TP[3]
VCCDDR
VCCPE
VCCPE
VSS
VSS
VSS
VSS
VCC
VSS
VCC
VSS
VCC
VSS
VCC
VSS
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
®
5100 Memory Controller Hub Chipset Signals By Ball (Sheet 9 of 16)
Buffer Type Direction Ball No.
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
CMOS
CMOS
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
PEX
PEX
PEX
PEX
PEX
PEX
PEX
PEX
PEX
PEX
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
Intel
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB10
AB11
AB12
AB13
AB14
AB15
AB16
AB17
AB18
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
®
5100 MCH Chipset—Ballout and Package Information
CH1_DQSN[15]
CH1_DQSP[15]
Signal Name
CH0_DQ[59]
CH0_DQ[62]
CH1_DQ[49]
CH1_DQ[50]
CH1_DQ[55]
CH1_DQ[54]
CH1_DQ[60]
CH1_DQ[61]
FSB1A[16]#
FSB1A[14]#
FSB1A[10]#
PE0RN[2]
PE0TN[2]
PE0TP[2]
PE0RP[2]
VCCDDR
PSEL[2]
PSEL[1]
VCC
VSS
VCC
VSS
VCC
VSS
VCC
VSS
VCC
VSS
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC
VCC
VSS
VCC
VSS
VCC
Order Number: 318378-005US
Buffer Type Direction
Source Sync
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Source Sync
Source Sync
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
CMOS
CMOS
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
PEX
PEX
PEX
PEX
July 2009
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
I
I
I