HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 169

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Register Description—Intel
3.8.12.24
3.8.12.25
July 2009
Order Number: 318378-005US
PEX_FAT_FERR[7:2,0] - PCI Express* First Fatal Error Register
This register records the occurrence of the first unmasked PCI Express* FATAL errors
and written by the MCH if the respective bits are not set prior. The classification of
uncorrectable errors into FATAL is based on the severity level of the UNCERRSEV
register described in
Severity.”
PEX_NF_COR_FERR[7:2,0] - PCI Express* First Non-Fatal or
Correctable Error Register
This register records the occurrence of the first unmasked PCI Express* NON-FATAL
(Uncorrectable) and CORRECTABLE errors. These errors are written by the MCH if the
respective bits are not set prior. The classification of uncorrectable errors into FATAL or
Non-Fatal is based on the UNCERRSEV register described in
“UNCERRSEV[7:2] - Uncorrectable Error Severity.”
Device:
Function:
Offset:
Device:
Function:
Offset:
31:13
31:18
Bit
Bit
12
11
10
17
16
15
14
13
9
8
7
6
5
4
3
2
1
0
®
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
Attr
Attr
5100 MCH Chipset
RV
RV
7-2, 0
0
154h
7-2, 0
0
158h
Default
Default
Section 3.8.12.7, “UNCERRSEV[7:2] - Uncorrectable Error
0h
0h
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
FIRST_FAT_Err_IO19: Surprise Link-down Status
First_FAT_Err_IO18: ESI Reset timeout
First_FAT_Err_IO9: PEX - Malformed TLP
First_FAT_Err_IO10: PEX - Receive Buffer Overflow Error
First_FAT_Err_IO8: PEX - Unexpected Completion Error
First_FAT_Err_IO7: PEX - Completer Abort
First_FAT_Err_IO6: PEX - Completion Timeout
First_FAT_Err_IO5: PEX - Flow Control Protocol Error
First_FAT_Err_IO4: PEX - Poisoned TLP
First_FAT_Err_IO3: PEX - Training Error
This field should not be used for setting Training error severity due to a
recent PCI-SIG ECN (Jan 22, 04) to remove training error. Hardware
behavior is undefined.
First_FAT_Err_IO2: PEX - Received Unsupported Request
First_FAT_Err_IO1: PEX - Received Fatal Error Message
First_FAT_Err_IO0: PEX - Data Link Layer Protocol Error
Reserved
First_NFAT_Corr_Err_IO19: Surprise Link-down (uncorrectable)
First_NFAT_COR_Err_IO17: PEX - Received Correctable Error Message
First_NFAT_COR_Err_IO16: PEX - Replay Timer Timeout (correctable)
First_NFAT_COR_Err_IO15: PEX - Replay_Num Rollover (correctable)
First_NFAT_COR_Err_IO14: PEX - BAD DLLP Error (correctable)
Description
Description
Intel
®
5100 Memory Controller Hub Chipset
Section 3.8.12.7,
Datasheet
169