HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 29

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HH80556KH0364M S LAGD

Manufacturer Part Number
HH80556KH0364M S LAGD
Description
Manufacturer
Intel
Datasheet

Specifications of HH80556KH0364M S LAGD

Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
Introduction—Intel
1.2
Table 2.
July 2009
Order Number: 318378-005US
Related Documents and Materials
Intel
following links take you to the EDK server and require you to log into Intel
Link (IBL).
Related Documents (Sheet 1 of 2)
82801Ix I/O Controller Hub (ICH9) – External Design Specification
(EDS)
82801Ix I/O Controller Hub (ICH9) – Specification Update - NDA
Debug Port Design Guide for Intel
Platforms (External Version)
Dual-Core Intel
Dual-Core Intel
Dual-Core Intel
Design Guidelines
Dual-Core Intel
Dual-Core Intel
Dual-Core Intel
Design Guidelines
Dual-Core Intel
Applications Thermal/Mechanical Design Guidelines
Intel
Hoodsport/Hoodsport 2 CPLD Code&Schematics (for PCI Hot Plug*
reference material, Intel
required)
Intel
Design Specification (EDS) Addendum
Intel
(embedded) – Electronic Pin List and Ballmap
Intel
Embedded, and Storage Applications Thermal/Mechanical Design
Guide
Intel
Data Sheets (MDDS) for product RoHS compliance information.
Search on the web site with the Intel
Code available from your local Intel sales representative.
Intel
Intel
Intel
Documentation Changes
Intel
Volumes 1–3
Intel
Intel
Notes:
1.
®
Quad-Core and Dual-Core Intel® Xeon® Processor 5000 Sequence with Intel®
5100 Memory Controller Hub Chipset for Communications, Embedded, and Storage
Applications
Intel® Core™2 Duo Processors T9400 and SL9400 and Intel® 5100 Memory
Controller Hub Chipset for Communications and Embedded Applications
5100 MCH Chipset
®
®
®
®
®
®
®
®
®
®
®
®
5000 Series Chipset MCH CRB Bridgeport/Bridgeport 2/
5100 Memory Controller Hub Chipset (embedded) – External
5100 Memory Controller Hub Chipset B0 Stepping
5100 Memory Controller Hub Chipset for Communications,
5100 Memory Controller Hub Chipset Material Declaration
5100 Memory Controller Hub Chipset Specification Update
64 and IA-32 Architectures Optimization Reference Manual
64 and IA-32 Architectures Software Developer’s Manual
64 and IA-32 Architectures Software Developer’s Manual,
Core™2 Duo Processor, Intel
Core™2 Extreme Processor on 45-nm Process Datasheet
Electronic Design Kits (EDKs) provide online, real-time collateral updates. The
Contact your Intel sales representative. Some documents may not be available at this time.
®
®
®
®
®
®
®
Xeon
Xeon
Xeon
Xeon
Xeon
Xeon
Xeon
®
®
®
®
®
®
®
®
Processor 5100 Series Datasheet
Processor 5100 Series Specification Update
Processor 5100 Series Thermal/Mechanical
Processor 5200 Series Datasheet
Processor 5200 Series Specification Update
Processor 5200 Series Thermal/Mechanical
Processor LV 5138 in Embedded
5000 Series MCH Chipset PDG password
Document
®
®
5000 Series Chipset Based
®
Core™2 Solo Processor and
5100 MCH Chipset Product
Intel
Note
Note
Note
http://www.intel.com/
http://www.intel.com/
http://www.intel.com/
http://www.intel.com/
http://www.intel.com/
http://www.intel.com/
http://www.intel.com/
Note
Note
Note
http://www.intel.com/
http://intelmdds.pcnalert.com/MDDS/
MDDSView.aspx
http://www.intel.com/
http://www.intel.com/
http://www.intel.com/
http://www.intel.com/
253666, 253667, 253668, 253669)
http://www.intel.com/
®
5100 Memory Controller Hub Chipset
Document Number/Location
1
1
1
1
1
1
(313355)
(313356)
(313357)
(318590)
(318586)
(318675)
(315225)
(318676)
(318385)
(248966)
(252046)
(253665,
(320120)
®
Business
Datasheet
29

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