HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 108

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HH80556KH0364M S LAGD

Manufacturer Part Number
HH80556KH0364M S LAGD
Description
Manufacturer
Intel
Datasheet

Specifications of HH80556KH0364M S LAGD

Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
3.8.5.4
3.8.5.5
3.8.5.6
3.8.6
3.8.6.1
Intel
Datasheet
108
®
5100 Memory Controller Hub Chipset
SPAD[3:0] - Scratch Pad Registers
These scratch pad registers each provide 32 read/writable bits that can be used by
software. They are also aliased to fixed memory addresses.
SPADS[3:0] - Sticky Scratch Pad
These sticky scratch pad registers each provide 32 read/writable bits that can be used
by software. They are also aliased to fixed memory addresses.
BOFL[3:0] - Boot Flag Register
These registers can be used to select the system boot strap processor or for other cross
processor communication purposes. When this register is read, the contents of the
register is cleared. Therefore, a processor that reads a non-zero value owns the
semaphore. Any value can be written to this register at any time.
An example of usage would be for all processors to read the register. The first one that
gets a non-zero value owns the semaphore. Since the read clears the value of the
register, all other processors will see a zero value and will spin until they receive further
notification. After the winning processor is done, it writes a non-zero value of its choice
into the register, arming it for subsequent uses. These registers are also aliased to fixed
memory mapped I/O addresses.
Control and Interrupt Registers
PROCENABLE: Processor Enable Global Control
The two FSBEN bits are used to enable or disable frontside bus arbitration. When
frontside bus arbitration is disabled the processor is effectively disabled.
Device:
Function:
Offset:
Device:
Function:
Offset:
Device:
Function:
Offset:
31:0
31:0
31:0
Bit
Bit
Bit
Attr
RW
RWST
RCW
Attr
Attr
16
0
DCh, D8h, D4h, D0h
16
0
ECh, E8h, E4h, E0h
16
0
C0h, C4h, C8h, CCh
00000000h
Default
A5A5A5A5h
00000000h
Default
Default
Scratch Pad value. These bits have no effect on the hardware.
SemaVal: Semaphore Value
Can be written to any value. Value is cleared when there is a read.
Scratch Pad value. These sticky bits have no effect on the hardware.
Intel
®
Description
Description
5100 MCH Chipset—Register Description
Description
Order Number: 318378-005US
July 2009

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