HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 153
HH80556KH0364M S LAGD
Manufacturer Part Number
HH80556KH0364M S LAGD
Description
Manufacturer
Intel
Datasheet
1.HH80556KH0364M_S_LAGD.pdf
(434 pages)
Specifications of HH80556KH0364M S LAGD
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
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Register Description—Intel
Note:
July 2009
Order Number: 318378-005US
Note that the Assert_INTx/Assert_HPGPE message is sent to ESI port when any of the
events defined in bits[4:0] (CMDCOMP, PRSINT, MRLSC, PWRINT, ABP) of the
PEXSLOTSTS register are set provided the corresponding events in bits [4:0] of the
Section 3.8.11.10
MCH will send a Deassert_HPGPE message to ESI port (wired-OR).
For the case when MSI is enabled, any new event that sets these bits (e.g., ABP,
PRSINT etc.) will cause an MSI message to be sent to the FSB for each occurrence, i.e.,
each bit is considered unique.
Whereas in the case of Legacy interrupts, a wired-OR approach is used to mimic the
level sensitive behavior and only one Assert_INTx/Assert_GPE (Deassert_INTx/
Deassert_GPE) is sent even when multiple interrupt generating bits of the register get
set. Refer to
The ESI port, device 0, does not support PCI Hot Plug* capabilities.
Device:
Function:
Offset:
Bit
3
2
1
0
®
RWC
RWC
RWC
RWC
Attr
5100 MCH Chipset
0, 2-3, 4-7
0
86h
Figure
Default
0h
0h
0h
0h
and HPINTEN are enabled. Software writes to clear these bits and
13.
PRSINT: Presence Detect Changed
This bit is set by the Intel
Changed event is detected. It is subsequently cleared by software after the
field has been read and processed.
MRLSC: MRL Sensor Changed
This bit is set by the Intel
event is detected. It is subsequently cleared by software after the field has
been read and processed.
PWRINT: Power Fault Detected
This bit is set by the Intel
detected by the power controller. It is subsequently cleared by software after
the field has been read and processed.
ABP: Attention Button Pressed
This bit is set by the Intel
pressed. It is subsequently cleared by software after the field has been read
and processed.
®
®
®
®
5100 MCH Chipset when a Presence Detect
5100 MCH Chipset when an MRL Sensor Changed
5100 MCH Chipset when a power fault event is
5100 MCH Chipset when the attention button is
Description
Intel
®
5100 Memory Controller Hub Chipset
Datasheet
153
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