HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 342

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

5.17.9
5.18
5.18.1
5.19
Intel
Datasheet
342
®
5100 Memory Controller Hub Chipset
PCI Hot Plug*
Native PCI Hot Plug* allows for higher availability and serviceability of a server. It gives
the user the capability of adding, removing, or swapping out a PCI Express* slot device
without taking down the system. The user and system communicate through a
combination of software and hardware utilizing notification through mechanical means
and indicator lights. PCI Hot Plug* is not supported on the Intel
Each Intel
capability described in PCI Express* Base Specification, Rev. 1.0a. The PCI Hot Plug*
model implies a PCI Hot Plug* controller per port which is identified to software as a
capability of the peer-to-peer bridge configuration space.
PCI Hot Plug* support requires that the MCH supports a set of PCI Hot Plug* messages
to manage the states between the PCI Hot Plug* controller and the device.
The PCI Express* form factor has an impact on the level of support required from the
MCH. For example, some of the PCI Hot Plug* messages are required only if the LED
indicators reside on the actual card and are accessed through the endpoint device. The
MCH supports all of the PCI Hot Plug* messages.
Power Management
The Intel
Supported ACPI States
The MCH supports the following ACPI States:
System Reset
The Intel
ICH9R is responsible for general propagation of system reset throughout the platform
through the PLTRST# signal. The ICH9R facilitates any specialized synchronization of
reset mechanisms required by the various system components.
• ACPI supported
• System States: S0, S1 (desktop), S3, S4, S5, C0, C1, C2 (desktop)
• Processor
• System
— C0: Full On.
— C1: Auto Halt.
— C2 Desktop: Stop Grant. Clock to processor still running. Clock stopped to
— G0/S0: Full On.
— G1/S1: Stop Grant, Desktop S1, same as C2.
— G1/S2: Not supported.
— G1/S3: Suspend to RAM (STR). Power and context lost to chipset.
— G1/S4: Suspend to Disk (STD). All power lost (except wake-up logic on
— G2/S5: Soft off. Requires total system reboot.
— G3: Mechanical Off. All power lost (except real time clock).
processor core.
ICH9R).
®
®
®
5100 MCH Chipset power management support includes:
5100 MCH Chipset is a integral part of the I/O subsystem tree, however, the
5100 MCH Chipset PCI Express* port supports the optional PCI Hot Plug*
Intel
®
5100 MCH Chipset—Functional Description
Order Number: 318378-005US
®
5100 MCH Chipset.
July 2009