HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 173
HH80556KH0364M S LAGD
Manufacturer Part Number
HH80556KH0364M S LAGD
Description
Manufacturer
Intel
Datasheet
1.HH80556KH0364M_S_LAGD.pdf
(434 pages)
Specifications of HH80556KH0364M S LAGD
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
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Register Description—Intel
3.8.13.1
July 2009
Order Number: 318378-005US
FERR_GLOBAL - Global First Error Register
The first fatal and/or first non-fatal errors are flagged in the FERR_GLOBAL register,
subsequent errors are indicated in the NERR_GLOBAL register.
Device:
Function:
Offset:
27:24
11:10
Bit
31
30
29
28
23
22
21
20
19
18
17
16
15
14
13
12
9
8
7
6
®
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
Attr
5100 MCH Chipset
RV
RV
RV
16
2
40h
Default
0h
0h
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Global_FERR_31:
Internal Intel
Global_FERR_30:
DMA Engine Device Fatal Error
Global_FERR_29:
FSB1 Fatal Error
Global_FERR_28:
FSB0 Fatal Error
Reserved
Global_FERR_23:
PCI Express* Device 7 Fatal Error
Global_FERR_22:
PCI Express* Device 6 Fatal Error
Global_FERR_21:
PCI Express* Device 5 Fatal Error
Global_FERR_20:
PCI Express* Device 4 Fatal Error
Global_FERR_19:
PCI Express* Device 3 Fatal Error
Global_FERR_18:
PCI Express* Device 2 Fatal Error
Reserved
Global_FERR_16:
ESI Fatal Error
Global_FERR_15:
Internal Intel
Global_FERR_14:
DMA Engine Device Non Fatal Error
Global_FERR_13:
FSB1 Non-Fatal Error
Global_FERR_12:
FSB0 Non-Fatal Error
Reserved
Global_FERR_09:
DDR Channel 1 Non-Fatal Error
Global_FERR_08:
DDR Channel 0 Non-Fatal Error
Global_FERR_07:
PCI Express* Device 7 Non-Fatal Error
Global_FERR_06:
PCI Express* Device 6 Non-Fatal Error
®
®
5100 MCH Chipset Fatal Error
5100 MCH Chipset Non-Fatal Error
Description
Intel
®
5100 Memory Controller Hub Chipset
Datasheet
173
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