HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 306

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Figure 24.
5.12.1
Intel
Datasheet
306
®
5100 Memory Controller Hub Chipset
Intel
Interface
When operating with only the ESI port, the available bi-directional bandwidth to the
south bridge is 2 GB/s (1 GB/s each direction).
Peer-to-peer Support
Peer-to-peer support is defined as transactions which initiate on one I/O interface and
target another without going through main memory. The MCH ESI supports peer-to-
peer transactions for memory and I/O transactions. The compatibility interface can be
the destination of a peer-to-peer write or read except that peer-to-peer posted writes
targeting LPC in ICH9R are not allowed (to prevent PHOLD deadlocks). The
compatibility interface can be the source of a peer-to-peer read/write. Non-posted
requests may prefetch into MMIO (with potential side effects). Peer-to-peer
transactions are not observed on any interface except the target and destination (e.g.,
no processor bus snoops).
Peer-to-peer traffic from ESI to a PCI Express* port should attempt to maximize the
link bandwidth. Inbound coherent transactions and peer-to-peer transactions must
maintain ordering rules between each other. Peer-to-peer transactions follow inbound
ordering rules until they reach the head of the inbound queue. Once the transaction
reaches the head of the inbound queue, the MCH routes the transaction to the next
available slot in the outbound queue where PCI ordering is maintained until the end of
the transaction. The MCH does not support peer-to-peer where the source and
destination is the same PCI Express* interface. Note that legacy floppy drives which
also use PHOLD are supported by the Intel
®
5100 Memory Controller Hub Chipset to ICH9R Enterprise South Bridge
T r a n s a c t io n
T r a n s a c t io n
P o rt 0
E S I
P h y s ic a l
P h y s ic a l
M C H
L in k
IC H
L in k
®
Intel
5100 MCH Chipset.
®
5100 MCH Chipset—Functional Description
0 8 1 5 0 6 1 0 5 3
Order Number: 318378-005US
July 2009