HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 103

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Register Description—Intel
3.8.3.10
July 2009
Order Number: 318378-005US
EXSMRTOP - Extended System Management RAM Top Register
This register defines the location of the Extended (TSEG) SMM range by defining the
top of the TSEG SMM range (ESMMTOP).
Device:
Function:
Offset:
Device:
Function:
Offset:
5:4
2:1
7:4
3:0
Bit
Bit
3
0
®
Attr
RWL
RWL
RWL
Attr
RWL
RV
RV
5100 MCH Chipset
16
0
62h
16
0
63h
Default
Default
00
0h
1h
0
0
0
Reserved
G_SMRAME: Global SMRAM Enable
If set to a 1, then Compatible SMRAM functions are enabled, providing 128 kB
of DRAM accessible at the A0000h address while in SMM (ADS# with SMM
decode). To enable Extended SMRAM function this bit has be set to 1. Refer to
Appendix , “Extended SMRAM Space (TSEG)”
set, this bit becomes read only.
TSEG_SZ: TSEG Size
Selects the size of the TSEG memory block if enabled. Memory from
(ESMMTOP - TSEG_SZ) to ESMMTOP - 1 is partitioned away so that it may only
be accessed by the processor interface and only then when the SMM bit
(SMMEM#) is set in the request packet. Non-SMM accesses to this memory
region are sent to ESI when the TSEG memory block is enabled. Note that
once D_LCK is set, these bits become read only.
00: 512 kB
01: 1 MB
10: 2 MB
11: 4 MB
T_EN: TSEG Enable
Enabling of SMRAM memory for Extended SMRAM space only. When
G_SMRAME =1 and TSEG_EN = 1, the TSEG is enabled to appear in the
appropriate physical address space. Note that once D_LCK is set, this bit
becomes read only.
Reserved
ESMMTOP: Top of Extended SMM Space (TSEG)
This field contains the address that corresponds to address bits 31 to 28. This
field points to the top (+1) of extended SMM space below 4 GB. Addresses
below 4 GB (A[39:32] must be 0) that fall in this range are decoded to be in
the extended SMM space and should be routed according to
“Extended SMRAM Space (TSEG)”
TSEG_SZ can be 512 kB, 1 MB, 2 MB, or 4 MB, depending on the value of
EXSMRC.TSEG_SZ.
ESMMTOP is relocatable to accommodate software that wishes to configure the
TSEG SMM space before MMIO space is known.
This field defaults to point to the same address as TOLM. Note that ESMMTOP
cannot be greater than TOLM otherwise the chipset will not function
deterministically.
Note that once D_LCK is set, this field becomes read only.
ESMMTOP-TSEG_SZ <= Address < ESMMTOP
Description
Description
as follows:
Intel
®
5100 Memory Controller Hub Chipset
for more details. Once D_LCK is
Section 4.3.3,
Datasheet
103