MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 67

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

3.2.3
Only system programmers use the supervisor programming model to implement sensitive operating
system functions, I/O control, and memory management. All accesses that affect the control features of
ColdFire processors are in the supervisor memory map and register descriptions, which consists of the
registers available to users as well as the following control registers:
Additional registers may be supported on a part-by-part basis.
The following sections describe the supervisor register descriptions.
3.2.3.1
The SR stores the processor status and includes the CCR, the interrupt priority mask, and other control
bits. In the supervisor mode, software can access the entire SR. In user mode, only the lower 8 bits are
accessible (CCR). The control bits indicate the following states for the processor: trace mode (T-bit),
supervisor or user mode (S bit), and master or interrupt state (M).
Freescale Semiconductor
Store AccExtensions01
Store AccExtensions23
Load AccExtensions01
Load AccExtensions23
15
T
•
•
Command
16-bit status register (SR)
32-bit vector base register (VBR)
14
0
Supervisor Memory Map and Register Description
Status Register (SR)
31–20
13
S
System Byte
12
M
MOV.L {Ry,#imm},Raccext01 Loads the accumulator 0,1 extension bytes with a 32-bit
MOV.L {Ry,#imm},Raccext23 Loads the accumulator 2,3 extension bytes with a 32-bit
MOV.L Raccext01,Rx
MOV.L Raccext23,Rx
Table 3-3. eMAC Instruction Summary (continued)
11
0
Mnemonic
Figure 3-3. Supervisor Memory Map
10
System Byte
MCF5253 Reference Manual, Rev. 1
MUST BE ZEROS
Figure 3-4. Status Register
15– 8
I [2–0]
9
19–0
8
operand
operand
Writes the contents of accumulator 0,1 extension bytes into a CPU
register
Writes the contents of accumulator 2,3 extension bytes into a CPU
register
CCR
7–0
7
0
6
0
Condition Code Register (CCR)
VBR
SR
5
0
Description
VECTOR BASE REGISTER
X
4
STATUS REGISTER
N
3
Z
2
ColdFire Core
V
1
C
0
3-5