MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 631

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor
FLTCONF
BIT1ERR
BIT0ERR
CRCERR
FRMERR
ACKERR
STFERR
RXWRN
TXWRN
31–16
TXRX
Field
IDLE
5–4
15
14
13
12
11
10
9
8
7
6
3
Reserved, should be cleared.
Bit1 error. Indicates inconsistency between the transmitted and received bit in a message.
0 No transmit bit error
1 At least one bit sent as recessive was received as dominant
Note: The transmit bit error field is not modified during the arbitration field or the ACK slot bit time of a message,
Bit0 error. Indicates inconsistency between the transmitted and received bit in a message.
0 No transmit bit error
1 At least one bit sent as dominant was received as recessive
Acknowledge error. Indicates whether an acknowledgment has been correctly received for a transmitted message.
0 No ACK error was detected since the last read of this register.
1 An ACK error was detected since the last read of this register.
Cyclic redundancy check error. Indicates whether or not a CRC error has been detected by the receiver.
0 No CRC error was detected since the last read of this register.
1 A CRC error was detected since the last read of this register.
Message form error. Indicates that a form error has been detected by the receiver node, i.e., a fixed-form bit field
contains at least one illegal bit.
0 No form error was detected since the last read of this register.
1 A form error was detected since the last read of this register.
Bit stuff error.
0 No bit stuffing error was detected since the last read of this register.
1 A bit stuffing error was detected since the last read of this register.
Transmit error status flag. Reflects the status of the FlexCAN transmit error counter.
0 Transmit error counter < 96
1 TXErrCounter ≥ 96
Receiver error status flag. Reflects the status of the FlexCAN receive error counter.
0 Receive error counter < 96
1 RxErrCounter ≥ 96
Idle status. Indicates when there is activity on the CAN bus.
0 The CAN bus is not idle.
1 The CAN bus is idle.
Transmit/receive status. Indicates when the FlexCAN module is transmitting or receiving a message. TXRX has no
meaning when IDLE = 1.
0 The FlexCAN is receiving a message if IDLE = 0.
1 The FlexCAN is transmitting a message if IDLE = 0.
Fault confinement state. Indicates the confinement state of the FlexCAN module, as shown below. If the
CANCTRLn[LOM] bit is set, FLTCONF will indicate error-passive. Since the CANCTRLn register is not affected by
soft reset, the FLTCONF field will not be affected by soft reset if the LOM bit is set.
00 Error active
01 Error passive
1x Bus off
Reserved, should be cleared.
Table 25-8. FlexCAN Error and Status (ERRSTATn) Register Field Descriptions
or by a transmitter that detects dominant bits while sending a passive error frame.
MCF5253 Reference Manual, Rev. 1
Description
FlexCAN Module
25-15