MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 318

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Audio Interface Module (AIM)
17.6.1.9
On the input interface, 2 data receive registers are defined:
The hardware associated with the IEC958 receiver U-channel reception is intended for reception of the
following kind of data:
17.6.1.10 Behavior of User Channel Receive Interface (CD Data)
This section details the behavior of the user channel receive interface on incoming CD user channel
subcode in the IEC958 receiver. This mode is selected if UsyncMode (bit 1) in register CD-Subcode
control, is set.
17-20
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1. UChannelReceive—32-bit register to receive U-channel incoming subcode.
2. QChannelReceive—32-bit register to receive Q-channel of incoming subcode.
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•
1
2
3
USYNCMODE
USYNCMODE
UCHANTXTIM
On read back, last written value is returned.
On read back, zero is returned.
PRESETCOUNT(6:0) will only affect the free running counter when the register is written with PRESETEN = ‘1’.
Writing with PRESETEN = ‘0’ does not affect the counter.
UChannelRcvFull—Receive register full
UChannelRcvOverrun—Overrun error
QChannelRcvFull—Receive register full
QChannelOverrun—Overrun error on Q channel
ChannelSyncFound—Received sync on U/Q channel.
ChannelLengthError—Set when ChannelSyncFound occurs when there are less than 32 bits
waiting in QchannelReceive register, or less than 4 bytes in UChannelReceive, or when a syncing
error is found. To regain correct syncing, U channel receive register and Q channel receive register
must be read to establish correct synchronization.
CD or CD-compatible User channel subcode (P,Q and R-W, or Q and R-W). See the CD Red Book
specification for a detailed description.
Other types of subcode.
EBU2
EBU1
Field
7–3
2
1
0
U and Q Receive Register Interrupts
Table 17-9. CDTEXTCONTROL Register Field Descriptions (continued)
Reserved.
0 Other data
1 CD user channel reception
0 Other data
1 CD user channel reception
0 Timing to reg. UChannelTx from cd-text output interface
1 Timing to reg. UChannelTx from EBU1 output interface
MCF5253 Reference Manual, Rev. 1
Description
Freescale Semiconductor
Notes
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