MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 554

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Universal Serial Bus Interface
The scheduling cases are:
24-92
•
•
Periodic Schedule
Case 1: The normal scheduling case is where the entire split transaction is completely bounded by
a frame (H-Frame in this case).
Case 2a through Case 2c: The USB 2.0 hub pipeline rules states clearly, when and how many
complete-splits must be scheduled to account for earliest to latest execution on the full/low-speed
link. The complete-splits may span the H-Frame boundary when the start-split is in micro-frame 4
or later. When this occurs, the H-Frame to B-Frame alignment requires that the queue head be
reachable from consecutive periodic frame list locations. The system software cannot build an
efficient schedule that satisfies this requirement unless it uses FSTNs.
general layout of the periodic schedule.
HS/FS/LS Bus
Micro-Frame
End of Frame
End of Frame
End of Frame
Micro-Frame
Normal Case
Case 2a:
Case 2b:
Case 2c:
Case 1:
B-Frame N–1
Figure 24-53. Split Transaction, Interrupt Scheduling Boundary Conditions
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MCF5253 Reference Manual, Rev. 1
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H-Frame N
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B-Frame N
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Figure 24-54
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Freescale Semiconductor
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B-Frame N+1
illustrates the