MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 260

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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UART Modules
Writing control bytes into the appropriate registers controls the UART operation. A list of UART module
registers and their associated addresses is shown in
For the registers described in this section, the numbers above the register description represent the bit
position in the register. The register description contains the mnemonic for the bit. The values as shown in
the following tables are the values of those register bits after a hardware reset. A value of U indicates that
the bit value is unaffected by reset. The read/write status is shown in the last line.
15.4.1
The UMR1 controls some of the UART module configuration. This register can be read or written at any
time and is accessed when the mode register pointer points to UMR1. The pointer is set to UMR1 by
RESET or by a set pointer command using the control register. After reading or writing UMR1, the pointer
points to UMR2.
15-14
MBAR+$1CC MBAR+$20C MBAR2+$C0C
MBAR+$1DC MBAR+$21C MBAR2+$C1C
MBAR+$1FC MBAR+$23C MBAR2+$C3C
MBAR+$1C0 MBAR+$200 MBAR2+$C00
MBAR+$1C4 MBAR+$204 MBAR2+$C04
MBAR+$1C8 MBAR+$208 MBAR2+$C08
MBAR+$1D0 MBAR+$210 MBAR2+$C10
MBAR+$1D4 MBAR+$214 MBAR2+$C14
MBAR+$1D8 MBAR+$218 MBAR2+$C18
MBAR+$1F0 MBAR+$230 MBAR2+$C30
MBAR+$1F4 MBAR+$234 MBAR2+$C34
MBAR+$1F8 MBAR+$238 MBAR2+$C38
This address is used for factory testing and should not be read. Reading this location results in undesired effects and possible
incorrect transmission or reception of characters. Register contents can also be changed.
Address-triggered commands.
UART 0
Mode Register 1 (UMR1n)
All UART module registers are accessible only as bytes. The contents of the
mode registers (UMR1 and UMR2), clock-select register (UCSR), and the
auxiliary control register (UACR) bit 7 should be changed only after the
receiver/transmitter is issued a software RESET command—i.e., channel
operation must be disabled. Be careful if the register contents are changed
during receiver/transmitter operations because unpredictable results can
occur.
UART 1
UART2
Table 15-1. UART Module Memory Map
MCF5253 Reference Manual, Rev. 1
Input Port Change Register (UIPCR)
Interrupt Status Register (UISR)
DO NOT ACCESS
Register Read (R/W = 1)
Input Port Register (UIP)
Status Register (USR)
Receiver Buffer (URB)
DO NOT ACCESS
DO NOT ACCESS
DO NOT ACCESS
NOTE
Table
Baud Rate Generator Prescale MSB (UBG1)
Baud Rate Generator Prescale LSB (UBG2)
15-1.
Interrupt Vector Register (UIVR)
Mode Register (UMR1, UMR2)
1
1
1
1
Output Port Bit Reset CMD (UOP0)
Auxiliary Control Register (UACR)
Output Port Bit Set CMD (UOP1)
Interrupt Mask Register (UIMR)
Clock-Select Register (UCSR)
Command Register (UCR)
Register Write (R/W = 0)
Transmitter Buffer (UTB)
DO NOT ACCESS
Freescale Semiconductor
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