MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 404

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Background Debug Mode (BDM) Interface
DATA[31:0]–Data Breakpoint Value
This field contains the 32-bit value to be compared with the data value from the processor’s local bus as a
breakpoint trigger.
MASK[31:0]–Data Breakpoint Mask
This field contains the 32-bit mask for the data breakpoint trigger. A zero in a bit position causes the
corresponding bit in the DBR to be compared to the appropriate bit of the internal data bus. A one causes
that bit to be ignored.
The data breakpoint register supports both aligned and misaligned references. The relationship between
the processor address, the access size, and the corresponding location within the 32-bit data bus is shown
in
20-34
Table
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
20-20.
31
15
31
15
–
–
–
–
30
14
30
14
–
–
–
–
29
13
29
13
–
–
–
–
Figure 20-35. Data Breakpoint Mask Register (DBMR)
28
12
28
12
–
–
–
–
Figure 20-34. Data Breakpoint Register (DBR)
27
11
27
11
–
–
–
–
MCF5253 Reference Manual, Rev. 1
26
10
26
10
–
–
–
–
25
25
–
–
–
–
9
9
ADDRESS[31:0]
ADDRESS[31:0]
MASK [31:0]]
MASK [31:0]
24
24
–
–
–
–
8
8
23
23
–
–
–
–
7
7
22
22
–
–
–
–
6
6
21
21
–
–
–
–
5
5
20
20
–
–
–
–
4
4
19
19
–
–
–
–
3
3
Freescale Semiconductor
Access: User write only
Access: User write only
18
18
–
2
–
–
2
–
17
17
–
–
–
–
1
1
16
16
–
–
–
–
0
0