MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 557

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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An example traversal of a periodic schedule that includes FSTNs is illustrated in
In frame N (micro-frames 0-7), for this example, the host controller traverses all of the schedule data
structures utilizing the Normal Path Link Pointers in any FSTNs it encounters. This is because the host
controller has not yet encountered a Save-Place FSTN so it is not executing in Recovery Path mode. When
it encounters the Restore FSTN, (Restore-N), during micro-frames 0 and 1, it uses Restore-N. Normal Path
Link Pointer to traverse to the next data structure (that is, normal schedule traversal). This is because the
host controller must use a Restore FSTN's Normal Path Link Pointer when not executing in a
Recovery-Path mode. The nodes traversed during frame N include: {8
1
In frame N+1 (micro-frames 0 and 1), when the host controller encounters Save-Path FSTN (Save-N), it
observes that Save-N.Back Path Link Pointer.T-bit is zero (definition of a Save-Path indicator). The host
controller saves the value of Save-N. Normal Path Link Pointer and follows Save-N.Back Path Link
Freescale Semiconductor
0
...}.
Micro-Frames 0, 1
Normal Traversal
Normal Traversal
IN or an OUT). Refer to the EHCI Specification for a complete list of additional conditions that
must be met in general for the host controller to issue a bus transaction. Note that the host controller
must not execute a Start-split transaction while executing in Recovery Path mode. Refer to the
EHCI Specification for special handling when in Recovery Path mode.
Stop traversing the recovery path when it encounters an FSTN that is a Restore indicator. The host
controller unconditionally uses the saved value of the Save-Place FSTN's Normal Path Link
Pointer when returning to the normal path traversal. The host controller must clear the context of
executing a Recovery Path when it restores schedule traversal to the Save-Place FSTN's Normal
Path Link Pointer.
If the host controller determines that there is not enough time left in the micro-frame to complete
processing of the periodic schedule, it abandons traversal of the recovery path, and clears the
context of executing a recovery path. The result is that at the start of the next consecutive
micro-frame, the host controller starts traversal at the frame list.
for Frame N+1
for Frame N
Figure 24-55. Example Host Controller Traversal of Recovery Path via FSTNs
Frame Numbers
N+5
N+4
N+3
N+1
N–1
N–2
N
8
8
8
8
8
8
8
8
3.0
2.0
7
6
5
4
1
0
8
8
3.1
2.1
MCF5253 Reference Manual, Rev. 1
Save = N
8
8
3.2
2.2
T-Int = 0
8
2.3
N-Ptr
B-Ptr
4
4
4
4
3
2
1
0
2.0
, 8
Causes ‘Restore’
2.1
to Normal Path
, 8
2
2
2.2
Traversal
1
0
, 8
Figure
Universal Serial Bus Interface
N-Ptr
B-Ptr
Restore = N
2.3
Recovery Path
Traversal
, 4
2
24-55.
T-Int = 1
, 2
0
1
, Restore-N,
0
• • •
24-95

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