MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 473

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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24.6.2
The capability registers specify the software limits, restrictions, and capabilities of the host/device
controller implementation. Most of these registers are defined by the EHCI specification. Registers that
are not defined by the EHCI specification are noted in their descriptions.
24.6.2.1
This register is used as an offset to add to the register base address to find the beginning of the operational
register space, that is, the location of the USBCMD register.
Table 24-9
24.6.2.2
This is a two-byte register containing a BCD encoding of the EHCI revision number supported by this host
controller. The most-significant byte of the register represents a major revision and the least-significant
byte is the minor revision.
Table 24-10
Freescale Semiconductor
Address MBAR2 + 0x700
Address MBAR2 + 0x703
CAPLENGTH
Reset
Reset
W
Field
15–0
Field
R
7–0
W
R
Table 24-10. Host Controller Interface Version (HCIVERSION) Register Field Descriptions
15
0
provides bit descriptions for the CAPLENGTH register.
Table 24-9. Capability Registers Length (CAPLENGTH) Register Field Descriptions
Capability Registers
provides bit descriptions for the HCIVERSION register.
Capability Registers Length (CAPLENGTH)
Host Controller Interface Version (HCIVERSION)
0
7
Capability registers length. Value is 0x40.
14
0
Name
Figure 24-9. Host Controller Interface Version (HCIVERSION) Register
13
0
Figure 24-8. Capability Registers Length (CAPLENGTH)
1
6
Figure 24-9
EHCI revision number. Value is 0x0100 indicating version 1.0.
12
0
11
0
MCF5253 Reference Manual, Rev. 1
0
5
shows the HCIVERSION register.
10
0
0
9
0
4
HCIVERSION
CAPLENGTH
1
8
Description
Description
0
7
Figure 24-8
0
3
0
6
0
5
shows the CAPLENGTH register.
0
2
0
4
Universal Serial Bus Interface
0
3
1
0
Access: User read
Access: User read
2
0
0
1
0
0
24-11
0
0

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