MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 466

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Universal Serial Bus Interface
24.5.3
The core logic of the USB controller is clocked with a gated copy of the system clock (CPU clock / 2).
This clock can be disabled when the USB module is not in use or suspended. Note however that this clock
must be enabled prior to accessing any register in the USB controller. Failing to do so will result in an
unterminated bus cycle which will lock the bus.
The suspend/resume circuit that detects wake-up events on the bus remains active, even when the USB
clock is turned off.
24.6
This section provides the memory map and detailed descriptions of all USB interface registers. The
memory map of the USB interface is shown in
24-4
MBAR2 + 0x600 ID—Identification register
MBAR2 + 0x604 HWGENERAL—General hardware parameters
MBAR2 + 0x608 HWHOST—Host hardware parameters
MBAR2 + 0x60c HWDEVICE—Device hardware parameters
MBAR2 + 0x610 HWTXBUF—TX buffer hardware parameters
MBAR2 + 0x614 HWRXBUF—RX buffer hardware parameters
MBAR2 + 0x703 CAPLENGTH—Capability Length Register
MBAR2 + 0x700 HCIVERSION—Host Interface Version Number
MBAR2 + 0x704 HCSPARAMS—Host Control Structural parameters
MBAR2 + 0x708 HCCPARAMS—Host Control Capability parameters
MBAR2 + 0x722 DCIVERSION—Dev. Interface Version Number
MBAR2 + 0x724 DCCPARAMS—Dev. Control Capability parameters
MBAR2 + 0x740 USBCMD—USB Command
MBAR2 + 0x744 USBSTS—USB Status
MBAR2 + 0x748 USBINTR—USB Interrupt Enable
MBAR2 + 0x74c FRINDEX—USB Frame Index
MBAR2 + 0x754 PERIODICLISTBASE—Frame List Base Address
MBAR2 + 0x758 ASYNCLISTADDR—Next Asynchronous List Address
MBAR2 + 0x75c TTCTRL—TT status and control
MBAR2 + 0x760 BURSTSIZE—Programmable DMA Burst Size
MBAR2 + 0x764 TXFILLTUNING—Host TT Xmit Pre-buffer Packet Tuning
MBAR2 + 0x780 CONFIGFLAG—Configured Flag Register
Offset
Memory Map and Register Definitions
System Clock
Table 24-2. USB Interface Memory Map
Register
MCF5253 Reference Manual, Rev. 1
Table
24-2.
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
0x0040_FA05
0x1002_0001
0x0000_0009
0x8004_0604
0x0001_0011
0x0000_0184
0x0008_0000
0x0000_0080
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0404
0x0000_0000
0x0000_0001
0x0000_0504
0x0000_0006
0x000_0115
0x0100
0x0001
Reset
0x40
Freescale Semiconductor
24.6.3.10/24-26
24.6.3.11/24-27
24.6.3.12/24-29
24.6.1.6/24-10
24.6.2.1/24-11
24.6.2.2/24-11
24.6.2.3/24-12
24.6.2.4/24-12
24.6.2.5/24-14
24.6.2.6/24-14
24.6.3.1/24-15
24.6.3.2/24-18
24.6.3.3/24-20
24.6.3.4/24-21
24.6.3.6/24-23
24.6.3.8/24-24
Section/Page
24.6.1.1/24-5
24.6.1.2/24-7
24.6.1.3/24-8
24.6.1.4/24-8
24.6.1.5/24-9
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