MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 251

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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15.3.1
The timer references made here relative to clocking the UART are different than the MCF5253 timer
module that is integrated on the bus of the ColdFire core. The UART has a baud generator based on an
internal baud-rate timer that is dedicated to the UART. The Clock Select Register (UCSR) needs to be
programmed to enable the baud-rate timer. With the baud-rate timer, a prescaler supplies an asynchronous
32x clock source to the baud-rate timer. The baud-rate timer register value is programmed with the UBG1
and UBG2 registers. See
information.
15.3.1.1
The system clock goes through a divide-by-32 prescaler and then passes through the 16-bit divider of the
concatenated UBG1n and UBG2n registers. The baud-rate calculation is:
Using a 80-MHz system clock and letting baud rate equal 19200, then
Therefore, UBG1n equals 0x00 and UBG2n equals 0x82.
15.3.2
The functional block diagram of the transmitter and receiver, including command and operating registers,
is shown in
For detailed register information, refer to
Freescale Semiconductor
Baud-Rate Generator/Timer
Transmitter and Receiver Operating Modes
Figure
Calculating Baud Rates
Divider
15-4. The following paragraphs describe these functions in reference to this diagram.
programmed in UCSR
Baud rate output
Section 15.4.12, “Baud Rate Generator (MSB) Register (UBG1n),”
UART
=
Figure 15-3. Baud-Rate Timer Generator Diagram
--------------------------------- -
[
32 x 19200
80MHz
Baud
Rate
Baudrate
MCF5253 Reference Manual, Rev. 1
]
=
Section 15.4, “UART Memory Map and Register Definitions.”
130 decimal
Output
Timer
=
(
----------------------------------- -
[
32 x Divider
f
sys
)
=
Internal
Timer
0x0082 hexadecimal
]
(
System Clock
Prescaler
x32
)
UART Modules
for more
Eqn. 15-1
Eqn. 15-2
15-5

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