MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 367

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

19.2.3.2
19.2.4
An IDE boot record has the following structure:
The load address provides the start location where the boot record will be stored within the MCF5253’s
memory map, the execution address provides the entry point code execution will begin from after the boot
record has been loaded into memory. The CRC allows the boot record to be validated before attempting to
begin code execution. The length of the boot record is described in number of sectors (512 bytes) it
occupies on the drive, up to a maximum of 256, making the maximum boot file size 131,060 bytes, 12
bytes are required for the boot record.
The boot record must be stored as the first three files in the root directory of a newly formatted FAT32
device. The files have to be in a continuous cluster (single section) and named as IDEBOOT1.IDE,
IDEBOOT2.IDE and IDEBOOT3.IDE.
19.2.5
19.2.5.1
In I
and SDA0). The I
memories. Only devices which use a 16-bit memory address are supported. The I
100KHz when the maximum crystal / external clock input is used (33.8688 MHz). The I
Freescale Semiconductor
2
•
•
C master mode, the boot loader reads data from a serial EEPROM/FLASH connected to I2C0 (SCL0
Store Immediate
— The store immediate command causes the boot loader to read from the serial device and store
Execute
— The execute command has no data associated to it. The address field contains the entry point
the data at the destination address as soon as a complete unit (1, 2 or 4 bytes) has been read.
The unit size is defined in the lower nibble of the command word.
of the code to be executed. The byte count is 0. Upon reception of an execute command, the
loader calls the routine at the specified address by means of a JSR instruction. If the called
routine returns, the loader will continue and read the next boot record.
IDE Boot Data Format
Boot Modes
Supported Commands
Boot From I
2
C address of the device must be 0b1010000x, as this address is standard for serial
Offset
10
12
0
4
8
2
C / SPI – Master Mode
# Bytes
4
4
2
2
–
MCF5253 Reference Manual, Rev. 1
Table 19-5. Boot Records
Load address in MCF5253 memory space
Execution address
Boot record CRC
Length of record in sectors (max 256)
Data/Code section
Description
2
C clock speed is set at
2
C clock speed
Boot ROM
19-5