MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 363

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 19
Boot ROM
This chapter describes the BootROM operation, the boot modes, and creation of record files.
19.1
The boot ROM on the MCF5253 serves to boot the CPU in designs which do not have external Flash
memory or ROM. Typically these systems use a separate MCU for control, and/or the MCF5253 is used
as a stand-alone decoder.
The boot loader resides in 8 K byte on-chip ROM and is enabled by means of a pull-down resistor
connected to address pin A23.
With the exception of the UART modes, the boot ROM assumes that the maximum input clock frequency
will be 33.8688 MHz.
Therefore, in I
frequency.
For the UART boot modes there are three different settings available to allow operation with the following
crystal or external clock frequencies: 5, 5.6448, 8.4672, 10, 11.2896, 16.9344, 20 and 33.8688 MHz.
19.1.1
The MCF5253 can be booted in one of three modes:
Boot from external ROM is selected by pulling A23 high during system Power-on Reset. In this mode, the
internal boot ROM is not available in the memory map, and the boot process is under control of the user
program in external memory connected to CS0.
By pulling A23 low during Power-on Reset, CS0 is assigned to the internal boot ROM, where code
execution will begin after RESET.
Pin CS0/CS4 is assigned the function of CS4.
The internal boot ROM code supports master and slave modes.
In Master mode operation, the MCF5253 will control the communication with the boot device. It will
attempt to load code from a slave device to RAM (either internal or external) and execute this code when
it receives an execute command. In this mode, no error recovery is performed by the boot loader.
Freescale Semiconductor
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External ROM
Internal ROM Master mode
Internal ROM Slave mode
Overview
Boot Modes
2
C master or SPI Master modes the generated serial clock will scale with the input clock
MCF5253 Reference Manual, Rev. 1
19-1