MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 529

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

between the system software and the host controller hardware. Information concerning the initialization of
the USB modules is included in the following section; however, the full details of the EHCI specification
are beyond the scope of this document.
24.9.1
After initial power-on or HCReset (hardware or via HCReset bit in the USBCMD register), all of the
operational registers will be at their default values, as illustrated in
only the operational registers not contained in the Auxiliary power well will be at their default values.
In order to initialize the host controller, the software should perform the following steps:
At this point, the host controller is up and running and the port registers begin reporting device connects.
The system software can enumerate a port through the reset process (where the port is in the enabled state).
At this point, the port is active with SOFs occurring down the enabled port enabled High-speed ports, but
the schedules have not yet been enabled. The EHCI host controller will not transmit SOFs to enabled Full-
or Low-speed ports.
Freescale Semiconductor
1. Optionally set Streaming Disable in the USBMODE register.
2. Optionally modify the BURSTSIZE register.
3. Program the PTS field of the PORTSCx register.
4. Set the USB_EN bit in the CONTROL register.
5. Program the CTRLDSSEGMENT register with 4-Gigabyte segment where all of the interface data
6. Write the appropriate value to the USBINTR register to enable the appropriate interrupts.
7. Write the base address of the Periodic Frame List to the PERIODICLIST BASE register. If there
8. Write the USBCMD register to set the desired interrupt threshold, frame list size (if applicable) and
structures are allocated.
are no work items in the periodic schedule, all elements of the Periodic Frame List should have
their T-Bits set.
turn the controller on via setting the Run/Stop bit.
Host Controller Initialization
Operational Register
PERIODICLISTBASE
CTRLDSSEGMENT
Table 24-62. Default Values of Operational Register Space
ASYNCLISTADDR
CONFIGFLAG
USBINTR
FRINDEX
USBCMD
PORTSC
USBSTS
MCF5253 Reference Manual, Rev. 1
0x0000_1000
0x0000_0000
0x0000_0000
0x0000_0000
Undefined
Undefined
0x0000_00001
0x1c00_0004
0x0008_0000
Default Value (after Reset)
Table
24-62. After a hardware reset,
Universal Serial Bus Interface
24-67