MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 445

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

23.5.2.2
Registers (ata_base +$0) till (ata_base + $17) contain timing parameters. These timing parameters control
the timing on the ATA bus as shown in details in the following illustrations:
Every timing parameter is 8-bit wide and can assume valid values between 1 and 255. Reset value is
always 1.
All figures in this section show timing registers.
23.5.2.2.1
See
the bit fields.
23.5.2.2.2
See
the bit fields.
Freescale Semiconductor
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Figure 23-12
Figure 23-13
Address MBAR2 + 0x800 (TIME_OFF)
Reset
Little endian, 16-bit or 32-bit register:
— bits [7:0]: byte 0
— bits [15:8]: byte 1
— bits [23:8]: byte 2
— bits [31:24]: byte 3
Big endian, 32-bit register:
— bits [31:24]: byte 0
— bits [23:16]: byte 1
— bits [15:8]: byte 2
— bits [7:0]: byte 3
Big endian, 16-bit register:
— bits [15:8]: byte 0
— bits [7:0]: byte 1
Section 23.4.3.2, “PIO Mode
Section 23.4.3.3, “Timing in Multiword DMA
Section 23.4.3.4, “UDMA In Timing Diagrams”
Section 23.4.3.5, “UDMA Out Timing
W
R
Timing Registers
TIME_OFF Register
TIME_ON Register
0
7
for illustration of valid bits in the TIME_OFF Register and
for illustration of valid bits in the TIME_ON Register and
0
6
Figure 23-12. TIME_OFF Register
MCF5253 Reference Manual, Rev. 1
Timing”
0
5
Diagrams”
TIME_OFF[7:0]
0
4
Mode”
0
3
Advanced Technology Attachment Controller (ATA)
2
0
Table 23-8
Table 23-8
Access: User read/write
0
1
for description of
for description of
1
0
23-19