MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 518

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Universal Serial Bus Interface
24.8.4.5
DWord 6 of a siTD is simply another schedule link pointer. This pointer is always zero, or references a
siTD. This pointer cannot reference any other schedule data structure.
24.8.5
This data structure is only used with a queue head. This data structure is used for one or more USB
transactions. This data structure is used to transfer up to 20480 (5 × 4096) bytes. The structure contains
two structure pointers used for queue advancement, a DWord of transfer state, and a five-element array of
data buffer pointers. This structure is 32 bytes (or one 32-byte cache line). This data structure must be
physically contiguous.
The buffer associated with this transfer must be virtually contiguous. The buffer may start on any byte
boundary. A separate buffer pointer list element must be used for each physical page in the buffer,
regardless of whether the buffer is physically contiguous.
Host controller updates (host controller writes) to stand-alone qTDs only occur during transfer retirement.
References in the following bit field definitions of updates to the qTD are to the qTD portion of a queue
head.
24-56
31–12 Buffer Pointer
11–5
31–5
4–3
2–0
Bit
4–1
Bit
0
(Page 1)
T-Count
Name
Back Pointer
Queue Element Transfer Descriptor (qTD)
TP
–
siTD Back Link Pointer
Name
–
T
Bits [31–12] is a 4K page-aligned, physical memory addresses. These bits correspond to physical
address bits [31–12] respectively. The field P specifies the current active pointer
Reserved.
Transaction position. This field is used with T-count to determine whether to send all, first, middle, or
last with each outbound transaction payload. The system software must initialize this field with the
appropriate starting value. The host controller must correctly manage this state during the lifetime of
the transfer. The bit encodings are:
00 All. The entire full-speed transaction data payload is in this transaction (that is, less than or equal
01 Begin. This is the first data payload for a full-speed transaction that is greater than 188 bytes.
10 Mid. This is the middle payload for a full-speed OUT transaction that is larger than 188 bytes.
11 End. This is the last payload for a full-speed OUT transaction that was larger than 188 bytes.
Transaction count. The software initializes this field with the number of OUT start-splits this transfer
requires. Any value larger than 6 is undefined.
to 188 bytes).
This field is a physical memory pointer to a siTD.
Reserved. This field is reserved for future use. It should be cleared.
Terminate
0 siTD Back Pointer field is valid
1 siTD Back Pointer field is not valid
Table 24-49. siTD Buffer Pointer Page 1 (Plus)
Table 24-50. siTD Back Link Pointer
MCF5253 Reference Manual, Rev. 1
Description
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