MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 187

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 11
General Purpose Timer Modules
This chapter describes the configuration and operation of the two general purpose timer modules (Timer0
and Timer1) in the MCF5253. The memory map, register descriptions, and example initialization code are
also provided.
11.1
The MCF5253 incorporates two independent, general-purpose 16-bit timers. The output of an 8-bit
prescaler clocks each 16-bit timer. The prescaler input can be the system clock or the system clock divided
by 16. Timer0 output pin is multiplexed with SDATAO1/TOUT0/GPIO18. Upon reset, this pin is
programmed as SDATAO1. To use the TOUT0 pin function it is necessary to program the Pin
Configuration register appropriately.
11.2
Each of the general purpose 16-bit timers provide the following features:
The minimum resolution of each timer is one system clock (SYSCLK) cycle (14.3 ns at 70 MHz). The
maximum timeout period (16 × 256 × 65536) ÷ 70 MHz = 3.83 seconds. ($0 - $FFFF = 65536 decimal.)
11.3
Figure 11-1
Freescale Semiconductor
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Maximum period of 3.83 seconds at 70 MHz SYSCLK (BCLK)
14.3 ns minimum resolution at 70 MHz
Programmable sources for the clock input
Output-compare with programmable mode for the output pin (Timer0 only)
Free run and restart modes
Maskable interrupt on reference-compare
Programmable to count and compare to a reference value stored in a register
An 8-bit prescalar output clocks the timers
Users can program the prescalar clock input
Programmed events generate interrupts
Users can configure the TOUT0 pin to toggle or to pulse on an event
Timer Module Overview
Timer Features
Block Diagram
is a block diagram of the timer module.
The maximum system clock (SYSCLK) is 1/2 CPU clock.
MCF5253 Reference Manual, Rev. 1
NOTE
11-1