MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 525

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor
31–30
29–23
31–28
26–16
13–12
11–8
Bit
6–0
Bit
27
15
14
7
Device Address This field selects the specific device serving as the data source or sink.
Port Number
Packet Length
Maximum
Name
Name
Mult
EndPt
EPS
RL
dtc
C
H
I
High-Bandwidth Pipe Multiplier. This field is a multiplier used to key the host controller as the number
of successive packets the host controller may submit to the endpoint in the current execution. The
host controller makes the simplifying assumption that the software properly initializes this field
(regardless of location of queue head in the schedules or other run time parameters).
00 Reserved. A zero in this field yields undefined results.
01 One transaction to be issued for this endpoint per micro-frame
10 Two transactions to be issued for this endpoint per micro-frame
11 Three transactions to be issued for this endpoint per micro-frame
This field is ignored by the host controller unless the EPS field indicates a full- or low-speed device.
The value is the port number identifier on the USB 2.0 hub (for hub at device address Hub Addr
below), below which the full- or low-speed device associated with this endpoint is attached. This
information is used in the split-transaction protocol.
Nak count reload. This field contains a value, which is used by the host controller to reload the Nak
Counter field.
endpoint is a control endpoint, then the software must set this bit to a one. Otherwise, it should
always set this bit to a zero.
This directly corresponds to the maximum packet size of the associated endpoint (wMaxPacketSize).
The maximum value this field may contain is 0x400 (1024).
the head of the reclamation list.
Data Toggle Control (DTC). This bit specifies where the host controller should get the initial data
toggle on an overlay transition.
0 Ignore DT bit from incoming qTD. Host controller preserves DT bit in the queue head.
1 Initial data toggle comes from incoming qTD DT bit. Host controller replaces DT bit in the queue
Endpoint Speed. This is the speed of the associated endpoint.
00 Full-Speed (12Mbs)
01 Low-Speed (1.5Mbs)
10 High-Speed (480 Mb/s)
11 Reserved. This field must not be modified by the host controller.
Endpoint Number. This 4-bit field selects the particular endpoint number on the device serving as
the data source or sink.
Inactivate on next transaction. This bit is used by the system software to request that the host
controller set the Active bit to zero. This field is only valid when the queue head is in the Periodic
Schedule and the EPS field indicates a Full or Low-speed endpoint. Setting this bit to a one when
the queue head is in the Asynchronous Schedule or the EPS field indicates a high-speed device
yields undefined results.
Control endpoint flag. If the QH[EPS] field indicates the endpoint is not a high-speed device, and the
Head of reclamation list flag. This bit is set by the system software to mark a queue head as being
Table 24-56. Endpoint Characteristics: Queue Head DWord 1
Table 24-57. Endpoint Capabilities: Queue Head DWord 2
head from the DT bit in the qTD.
MCF5253 Reference Manual, Rev. 1
Description
Description
Universal Serial Bus Interface
24-63