MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 510

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Universal Serial Bus Interface
Frame List Link pointers always reference memory objects that are 32-byte aligned. The referenced object
may be an isochronous transfer descriptor for high-speed devices, a split-transaction isochronous transfer
descriptor (for full-speed isochronous endpoints), or a queue head (used to support high-, full- and
low-speed interrupt). The system software should not place non-periodic schedule items into the periodic
schedule. The least significant bits in a frame list pointer are used to key the host controller as to the type
of object the pointer is referencing.
The least significant bit is the T-Bit (bit 0). When this bit is set, the host controller will never use the value
of the frame list pointer as a physical memory pointer. The Typ field is used to indicate the exact type of
data structure being referenced by this pointer. The value encodings for the Typ field are given in
Table
24.8.2
The Asynchronous Transfer List (based at the ASYNCLISTADDR register) is where all the control and
bulk transfers are managed. Host controllers use this list only when it reaches the end of the periodic list,
the periodic list is disabled, or the periodic list is empty.
The Asynchronous list is a simple circular list of queue heads. The ASYNCLISTADDR register is simply
pointer to the next queue head. This implements a pure round-robin service for all queue heads linked into
the asynchronous list.
24-48
31
24-37.
Asynchronous List Queue Head Pointer
AsyncListAddr
Operational
Registers
Figure 24-37. Asynchronous Schedule Organization
Typ
00
01
10
11
Figure 24-36. Frame List Link Pointer Format
Frame List Link Pointer
Table 24-37. Typ Field Encodings
MCF5253 Reference Manual, Rev. 1
Isochronous Transfer Descriptor
Queue Head
Split Transaction Isochronous Transfer Descriptor
Frame Span Traversal Node.
H
Bulk/Control Queue Heads
Description
5
Freescale Semiconductor
4
00
3
2
Typ
1
T
0