MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 387

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Command Sequence:
Operand Data:
Two operands are required for this instruction. The first operand is a longword absolute address that
specifies a location to which the operand data is to be written. The second operand is the data. Byte data
is transmitted as a 16-bit word, justified in the least significant byte; 16- and 32-bit operands are
transmitted as 16 and 32 bits, respectively.
Result Data:
Command complete status is indicated by returning the data $FFFF (with the status bit cleared) when the
register write is complete. A value of $0001 (with the status bit set) is returned if a bus error occurs.
20.3.4.1.5
DUMP is used in conjunction with the READ command to access large blocks of memory. An initial
READ is executed to set up the starting address of the block and to retrieve the first result. The DUMP
command retrieves subsequent operands. The initial address is incremented by the operand size (1, 2, or
Freescale Semiconductor
Write (Long)
Read (B/W)
???
???
Dump Memory Block (DUMP)
“Not Ready”
“Not Ready”
MS Addr
MS Addr
Figure 20-14. Write Memory Location Command Sequence
MCF5253 Reference Manual, Rev. 1
“Not Ready”
“Not Ready”
LS Addr
LS Addr
“Not Ready”
“Not Ready”
“Not Ready”
LS Data
MS Data
Data
Write
Memory
Location
Write
Memory
Location
Background Debug Mode (BDM) Interface
“Cmd Complete”
“Not Ready”
“Not Ready”
“Not Ready”
“Not Ready”
Next Cmd
Next Cmd
Next Cmd
Next Cmd
XXX
BERR
XXX
Result
BERR
XXX
XXX
20-17