MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 267

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

15.4.5.1.3
The reset transmitter command resets the transmitter. The transmitter is immediately disabled and the
TxEMP and TxRDY bits in the USR are cleared. All other registers are unaltered. Use this command
instead of the transmitter-disable command whenever the transmitter configuration is changed (it places
the transmitter in a known state).
15.4.5.1.4
The reset error status command clears the RB, FE, PE, and OE bits in the USR. This command is also used
in the block mode to clear all error bits after a data block is received.
15.4.5.1.5
The reset break-change interrupt command clears the delta break (DBx) bit in the UISR.
15.4.5.1.6
The start break command forces TxD low. If the transmitter is empty, the start of the break conditions can
be delayed by as much as two bit times. If the transmitter is active, the break begins when transmission of
the character is complete. If a character is in the transmitter shift register, the start of the break is delayed
until the character is transmitted. If the transmitter holding register has a character, that character is
transmitted before the break. The transmitter must be enabled for this command to be accepted. The state
of the CTS input is ignored for this command.
15.4.5.1.7
The stop break command causes TxD to go high (mark) within two bit times. Characters stored in the
transmitter buffer, if any, are transmitted.
15.4.5.2
Bits TC1 and TC0 select a single command as listed in
15.4.5.2.1
The “no action taken” command causes the transmitter to stay in its current mode. If the transmitter is
enabled, it remains enabled; if disabled, it remains disabled.
Freescale Semiconductor
Transmitter Commands
Reset Transmitter
Reset Error Status
Reset Break-Change Interrupt
Start Break
Stop Break
No Action Taken
TC1
0
0
1
1
MCF5253 Reference Manual, Rev. 1
Table 15-10. TCx Control Bits
TC0
0
1
0
1
Transmitter Disable
Transmitter Enable
No Action Taken
Table
Do Not Use
Command
15-10.
UART Modules
15-21