MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 559

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

24.9.12.2.4 Tracking Split Transaction Progress for Interrupt Transfers
To correctly maintain the data stream, the host controller must be able to detect and report errors where
data is lost. For interrupt-IN transfers, data is lost when it makes it into the USB 2.0 hub, but the USB 2.0
host system is unable to get it from the USB 2.0 hub and into the system before it expires from the
transaction translator pipeline. When a lost data condition is detected, the queue is halted, thus signaling
the system software to recover from the error. A data-loss condition exists whenever a start-split is issued,
accepted and successfully executed by the USB 2.0 hub, but the complete-splits get unrecoverable errors
on the high-speed link, or the complete-splits do not occur at the correct times. One reason complete-splits
might not occur at the right time would be due to host-induced system hold-offs that cause the host
controller to miss bus transactions because it cannot get timely access to the schedule in system memory.
The same condition can occur for an interrupt-OUT, but the result is not an endpoint halt condition, but
rather effects only the progress of the transfer. The queue head has the following fields to track the progress
of each split transaction. These fields are used to keep incremental state about which (and when) portions
have been executed.
24.9.12.2.5 Split Transaction Execution State Machine for Interrupt
In the following section, all references to micro-frame are in the context of a micro-frame within an
H-Frame.
As with asynchronous Full- and Low-speed endpoints, a split-transaction state machine is used to manage
the split transaction sequence. Aside from the fields defined in the queue head for scheduling and tracking
the split transaction, the host controller calculates one internal mechanism that is also used to manage the
split transaction. The internal calculated mechanism is:
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C-prog-mask. This is an eight-bit bit-vector where the host controller keeps track of which
complete-splits have been executed. Due to the nature of the Transaction Translator periodic
pipeline, the complete-splits need to be executed in-order. The host controller needs to detect when
the complete-splits have not been executed in order. This can only occur due to system hold-offs
where the host controller cannot get to the memory-based schedule. C-prog-mask is a simple
bit-vector that the host controller sets one of the C-prog-mask bits for each complete-split
executed. The bit position is determined by the micro-frame number in which the complete-split
was executed. The host controller always checks C-prog-mask before executing a complete-split
transaction. If the previous complete-splits have not been executed then it means one (or more)
have been skipped and data has potentially been lost.
FrameTag. This field is used by the host controller during the complete-split portion of the split
transaction to tag the queue head with the frame number (H-Frame number) when the next
complete split must be executed.
S-bytes. This field can be used to store the number of data payload bytes sent during the start-split
(if the transaction was an OUT). The S-bytes field must be used to accumulate the data payload
bytes received during the complete-splits (for an IN).
cMicroFrameBit. This is a single-bit encoding of the current micro-frame number. It is an eight-bit
value calculated by the host controller at the beginning of every micro-frame. It is calculated from
the three least significant bits of the FRINDEX register (that is, cMicroFrameBit = (1
shifted-left(FRINDEX[2:0]))). The cMicroFrameBit has at most one bit asserted, which always
MCF5253 Reference Manual, Rev. 1
Universal Serial Bus Interface
24-97