MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 424

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

USB, ATA DMA, and Clock Integration Module
22.2.5
22.3
22.3.1
A 16 Kbytes local memory is put on a local bus, available as fast, local, memory to the ATA and USB
modules. A block diagram of how the devices are tied to this local bus is given in
22-4
Offset: MBAR2 0x510 (USBCANCLK)
CANCLK
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
USBCLK
Field
31–2
W
1
0
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Functional Description
Reserved, should be cleared.
FlexCAN clock gating.
0 FlexCAN clock disabled. The FlexCAN modules are placed in sleep mode and its interface is not available.
1 FlexCAN clock enabled.
USB clock gating.
0 USB clock disabled. When disabled, the USB is placed in standby mode, and only the USB resume interrupt will
1 USB clock enabled.
USB/FlexCAN Clock Register (USBCANCLK)
ATA/USB Cache Memory
work. This interrupt will signal reception of USB resume condition on the USB bus. All other functions are not
available.
Table 22-5. USB/FlexCAN Clock Register (USBCANCLK) Field Descriptions
Figure 22-4. USB/FlexCAN Clock Register (USBCANCLK)
Figure 22-5. ATA/USB Shared RAM Block Diagram
Controller
ATA DMA
MCF5253 Reference Manual, Rev. 1
USB Controller
ATA Controller
Description
Arbiter
9
16 kB RAM
8
7
6
Figure
Freescale Semiconductor
5
Access: User read/write
4
22-5.
3
2
CAN
CLK
1
1
USB
CLK
1
0