MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 472

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Universal Serial Bus Interface
24.6.1.6
The HWRXBUF register provide the receive buffer parameters for this implementation of the module.
Figure 24-7
Table 24-8
24-10
RXBURST
Address MBAR2 + 0x614
TXCHANADD
RXADD
TXBURST
31–16
Reset
Reset
Field
15–8
7–0
TXADD
30–24
23–16
TXLC
Field
15–8
7–0
31
W
W
R
R
31
15
0
0
Reserved.
Receive address. The number of address bits for the entire RX buffer. Always 0x5 (5).
Receive burst. Indicates the number of data beats in a burst for receive DMA data transfers. Always 0x4 (4).
Table 24-8. RX Buffer Hardware Parameters (HWRXBUF) Register Field Descriptions
provides bit descriptions for the HWRXBUF register.
Table 24-7. TX Buffer Hardware Parameters (HWTXBUF) Register Field Descriptions
shows the HWRXBUF register.
Receive Buffer Hardware Parameters (HWRXBUF) Register
Reserved. Always 1 on USB OTG.
Reserved.
Transmit channel address. The number of address bits required to address one channel’s worth of TX data.
Always 0x4.
Transmit address. The number of address bits for the entire TX buffer. Always 0x6.
Transmit burst. Indicates the number of data beats in a burst for transmit DMA data transfers. Always 0x4.
30
14
0
0
Figure 24-7. RX Buffer Hardware Parameters (HWRXBUF) Register
29
13
0
0
28
12
0
0
RXADD
27
11
0
0
MCF5253 Reference Manual, Rev. 1
26
10
0
1
25
0
0
9
Description
24
0
1
8
Description
23
0
0
7
22
0
0
6
21
0
0
5
RXBURST
20
0
0
4
19
0
0
3
Freescale Semiconductor
18
Access: User read
0
1
2
17
0
0
1
16
0
0
0