MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 599

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

24.11.3.5 Control Endpoint Operation Model
24.11.3.5.1 Setup Phase
All requests to a control endpoint begin with a setup phase followed by an optional data phase and a
required status phase. The USB_DR will always accept the setup phase unless the setup lockout is
engaged.
The setup lockout will engage so that future setup packets are ignored. Lockout of setup packets ensures
that while the software is reading the setup packet stored in the queue head, that data is not written as it is
being read potentially causing an invalid setup packet.
The setup lockout mechanism can be disabled and a tripwire type semaphore will ensure that the setup
packet payload is extracted from the queue head without being corrupted be an incoming setup packet.
This is the preferred behavior because ignoring repeated setup packets due to long software interrupt
latency would be a compliance issue.
Setup Packet Handling
24.11.3.5.2 Data Phase
Following the setup phase, the DCD must create a device transfer descriptor for the data phase and prime
the transfer.
After priming the packet, the DCD must verify a new setup packet has not been received by reading the
ENDPTSETUPSTAT register immediately verifying that the prime had completed. A prime will complete
when the associated bit in the ENDPTPRIME register is zero and the associated bit in the ENDPTSTATUS
register is a one. If a prime fails, that is, The ENDPTPRIME bit goes to zero and the ENDPTSTATUS bit
Freescale Semiconductor
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Disable Setup Lockout by writing '1' to Setup Lockout Mode (SLOM) in USBMODE. (once at
initialization). Setup lockout is not necessary when using the tripwire as described below.
After receiving an interrupt and inspecting ENDPTSETUPSTAT to determine that a setup packet
was received on a particular pipe:
— Write '1' to clear corresponding bit ENDPTSETUPSTAT.
— Write '1' to Setup Tripwire (SUTW) in USBCMD register.
— Duplicate contents of dQH.SetupBuffer into the local software byte array.
— Read Setup TripWire (SUTW) in USBCMD register. (if set
— Write '0' to clear Setup Tripwire (SUTW) in USBCMD register.
— Process setup packet using the local software byte array copy and execute status/handshake
Note: After receiving a new setup packet the status and/or handshake phases may still be pending
from a previous control sequence. These should be flushed and de-allocated before linking a new
status and/or handshake dTD for the most recent setup packet.
phases.
Leaving the Setup Lockout Mode As '0' will result in a potential compliance
issue.
MCF5253 Reference Manual, Rev. 1
NOTE
—
continue; if cleared
Universal Serial Bus Interface
—
goto 2)
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