MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 603

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

24.11.4 Managing Queue Heads
The device queue head (dQH) points to the linked list of transfer tasks, each depicted by the device
Transfer Descriptor (dTD). An area of memory pointed to by ENDPOINTLISTADDR contains a group of
all dQH's in a sequential list as shown in
receive endpoints (OUT/SETUP) and the odd elements are used for transmit endpoints (IN/INTERRUPT).
Device transfer descriptors are linked head to tail starting at the queue head and ending at a terminate bit.
Once the dTD has been retired, it will no longer be part of the linked list from the queue head. Therefore,
the software is required to track all transfer descriptors since pointers will no longer exist within the queue
head once the dTD is retired (see
In addition to the current and next pointers and the dTD overlay examined in
Operational Model For Packet
associated endpoint: Multipler, Maximum Packet Length, Interrupt On Setup. The complete initialization
of the dQH including these fields is demonstrated in the next section.
Freescale Semiconductor
1
2
Invalid
Table 24-87. Isochronous Endpoint Bus Response Matrix (continued)
Zero Length Packet
Force Bit Stuff Error
Ping
Ignore
Ignore
Stall
Transfers”, the dQH also contains the following parameters for the
Section 24.11.5.1, “Software Link
MCF5253 Reference Manual, Rev. 1
Not Primed
Figure
Ignore
Ignore
24-64. The even elements in the list of dQH's are used for
Primed
Ignore
Ignore
Underflow
Ignore
Ignore
Pointers”).
Section 24.11.3.3, “Device
Overflow
Ignore
Ignore
Universal Serial Bus Interface
24-141