MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 179

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

10.3
The chip select module provides a glueless interface to many types of external memory. The module
contains the necessary external control signals to interface to SRAM, PROM, EPROM, EEPROM,
FLASH and peripherals.
Some features of the chip selects are controlled by the IDECONFIG1 and IDECONFIG2 registers. These
are described in
Each of the three chip select outputs has an associated mask register and control register.
Chip selects (CS0/CS4, CS1/QSPI_CS3/GPIO28, IDE_DIOR / IDE_DIOW (CS2):
CS0 provides special functionality. It is a “global” chip select after reset and provides relocatable boot
ROM capability.
In addition to the two external chip select outputs, the module contains one chip select (CS2) for use with
AT-bus peripherals such as IDE drives and Flash Card interfaces. Capabilities for CS2 are like CS1, but
there are some enhancements for typical AT-bus features. The enhancements are described in
“Chip Select Memory Map and Register Definitions.”
10.3.1
The general-purpose chip selects are controlled by the chip select mask register (CSMR), the chip select
control register (CSCR), and by the chip select address register (CSAR). There is one CSAR, CSMR, and
CSCR for each of the chip selects (CS0, CS1, CS2 and CS4).
Chip Selects:
10.3.2
The MCF5253 only supports a 16-bit wide port size (PS). The size of the port controlled by a chip-select
is programmable. The port size is specified by the (PS) bits in the chip select control register (CSCR). It
should always be programmed as a 16-bit wide port. See
for details.
Freescale Semiconductor
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Each has a 16-bit base address register.
Each has a 32-bit mask register, which provides 16-bit address masking and access control.
Each has a 16-bit control register, which provides port size, burst capability, wait state generation
and automatic acknowledge generation.
The chip select address register controls the base address space of the chip select.
The chip select mask register controls the memory block size and addressing attributes of the chip
select.
The chip select control register programs the features of the chip select signals.
Chip Select Operation
General-Purpose Chip Select Operation
Port Sizing
Section 10.4, “Chip Select Memory Map and Register Definitions.”
MCF5253 Reference Manual, Rev. 1
Section 10.4.2.3, “Chip Select Control Register,”
Chip Select Module
Section 10.4,
10-3