MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 317

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Address MBAR2 + 0x92
Figure 17-11
description of the bit fields.
Freescale Semiconductor
Reset
Address MBAR2 + 0x88 (U channel 1)
Reset
Reset
W
R
PRESETCOUNT
W
W
PRESETEN
R
R
PRESETEN
MBAR2 + 0xD8 (U channel 2)
MBAR2 + 0x8C (Q channel 1)
MBAR2 + 0xDC (Q channel 2)
Field
14–8
QCHANNEL RECEIVE 1 AND 2
UCHANNEL RECEIVE 1 AND 2
15
31
15
–
–
15
Table 17-8. U Channel Receive and Q Channel Receive Registers Field Descriptions
0
illustrates the valid bits in the CDTEXTCONTROL Register and
30
14
–
–
14
Figure 17-10. U Channel Receive and Q Channel Receive Registers
0
0 No action on free-running sync position counter
1 Preset free-running sync position counter
Sync presetting count
Field
31–0
31–0
29
13
–
–
PRESETCOUNT(6:0)
13
0
Table 17-9. CDTEXTCONTROL Register Field Descriptions
12
0
28
12
–
–
11
0
Figure 17-11. CDTEXTCONTROL Register
27
11
–
–
10
0
MCF5253 Reference Manual, Rev. 1
U channel receive register. Contains next 4 U channel bytes.
Q channel receive register. Contains next 4 Q channel bytes.
0
9
26
10
–
–
0
8
UChannel Receive 1 and 2
QChannel Receive 1 and 2
UChannel Receive 1 and 2
QChannel Receive 1 and 2
25
–
–
Description
9
0
7
0
6
24
–
–
8
0
5
23
–
–
7
0
4
Description
0
3
22
–
6
–
USYNCMODE
21
–
–
5
EBU2
0
2
20
–
–
4
Table 17-9
USYNCMODE
Audio Interface Module (AIM)
19
–
–
3
EBU1
Access: User read only
Access: User read/write
1
0
18
–
–
2
provides the
Notes
2, 3
1, 3
UCHANTXTIM
17
–
–
1
0
0
17-19
16
–
–
0