MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 119

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5253CVM140
Manufacturer:
FREESCALE
Quantity:
300
Part Number:
MCF5253CVM140
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF5253CVM140
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MCF5253CVM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
7.4.6
Self-refresh is a method of allowing the SDRAM to enter into a low-power state, while at the same time
to perform an internal refresh operation and to maintain the integrity of the data stored in the SDRAM. The
DRAM controller supports self-refresh with DCR[IS]. When IS is set, the
SDRAM. When IS is cleared, the
self-refresh operation.
Freescale Semiconductor
(DCR[COC] = 0)
SDRAS
SDCAS
SD_CS
A[31:0]
SDWE
BCLK
BCLKE
SD_CS0
SDRAS
SDCAS
SDWE
Self-Refresh Operation
BCLK
PALL
PALL
t
RCD
t
NOP
NOP
RCD
= 2
= 2
SELFX
SELF
Figure 7-10. Auto-Refresh Operation
Figure 7-11. Self-Refresh Operation
REF
MCF5253 Reference Manual, Rev. 1
command is sent to the DRAM controller.
Refresh
Active
Self-
SELFX
t
NOP
RC
= 6
t
RC
= 6
NOP
Synchronous DRAM Controller Module
SELF
command is sent to the
Figure 7-11
ACTV
Possible
ACTV
First
shows the
7-15

Related parts for MCF5253CVM140