MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 516

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Universal Serial Bus Interface
24.8.4.3
DWords 3–6 are used to manage the state of the transfer.
24-54
31–16
15–8 µFrame C-mask Split Completion Mask. This field (along with the Active and SplitX- state fields in the Status byte) is
29–26
25–16
7–0
15–8
Bit
Bit
31
30
µFrame S-mask Split Start Mask. This field (along with the Active and SplitX-state fields in the Status byte) is used to
Total Bytes to
C-prog-mask
Name
Transfer
µFrame
Name
–
siTD Transfer State
ioc
P
–
Reserved. This field reserved for future use. It should be cleared.
used to determine during which micro-frames the host controller should execute complete-split
transactions. When the criteria for using this field is met, an all zeros value has undefined behavior.
The host controller uses the value of the three low-order bits of the FRINDEX register to index into
this bit field. If the FRINDEX register value indexes to a position where the µFrame C-Mask field is a
one, then this siTD is a candidate for transaction execution. There may be more than one bit in this
mask set.
determine during which micro-frames the host controller should execute start-split transactions. The
host controller uses the value of the three low-order bits of the FRINDEX register to index into this bit
field. If the FRINDEX register value indexes to a position where the µFrame S-mask field is a one, then
this siTD is a candidate for transaction execution. An all zeros value in this field, in combination with
existing periodic frame list has undefined results.
Interrupt On Complete
0 Do not interrupt when transaction is complete.
1 Do interrupt when transaction is complete. When the host controller determines that the split
Page Select. Used to indicate which data page pointer should be concatenated with the
CurrentOffset field to construct a data buffer pointer.
0 Selects Page 0 pointer
1 Selects Page 1 pointer
The host controller is not required to write this field back when the siTD is retired (Active bit
transitioned from a one to a zero).
Reserved. This field reserved for future use and should be cleared.
This field is initialized by the software to the total number of bytes expected in this transfer. Maximum
value is 1023 (3FFh)
Split complete progress mask. This field is used by the host controller to record which
split-completes have been executed.
transaction has completed, it will assert a hardware interrupt at the next interrupt threshold.
Table 24-47. siTD Transfer Status and Control
Table 24-46. Micro-frame Schedule Control
MCF5253 Reference Manual, Rev. 1
Description
Description
Freescale Semiconductor