MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 360

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5253CVM140
Manufacturer:
FREESCALE
Quantity:
300
Part Number:
MCF5253CVM140
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF5253CVM140
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MCF5253CVM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
I
18.6.7
If several devices try to engage the bus at the same time, only one becomes master and the others lose
arbitration. The devices that lost arbitration are immediately switched to slave receive mode by the
hardware. Their data output to the SDA line is stopped, but SCL is still generated until the end of the byte
during which arbitration was lost. An interrupt occurs at the falling edge of the ninth clock of this transfer
with IAL=1 and MSTA=0. If one master tries to transmit or do a START while the bus is being engaged
by another master, the hardware does the following:
When considering these cases, the slave service routine should test the IAL first and the software should
clear the IAL bit if it is set.
18-16
2
C Modules
1. Inhibits the transmission
2. Switches the MSTA bit from 1 to 0 without generating STOP condition
3. Generates an interrupt to CPU
4. Sets the IAL to indicate the failed attempt to engage the bus
Arbitration Lost
MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor

Related parts for MCF5253CVM140