MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 232

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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DMA Controller
14.4
The registers of each channel are mapped into memory as shown in
The DMA control module registers determine the operation of the DMA controller module. This section
describes each of the internal registers and its bit assignment.
14.4.1
The routing control register (DMAroute) controls where the non-processor DMA request for the four
DMA channels is coming from.
14-4
DMA Channel
Address
Reset
Reset
W
W
R
R
MBAR2 + $188
DMA Memory Map and Register Definitions
31
15
0
0
REQUEST Source Selection
There is no mechanism for preventing a write to a control register during
DMA transfer. This situation should be avoided.
MBAR2 + $188
30
14
0
0
Address
DMAroute Bits
29
13
0
0
31–24
23–16
15–8
7–0
Table 14-3. DMAroute Register Field Descriptions
DMA3REQ
DMA1REQ
28
12
0
0
Table 14-1. Memory Map DMA Channels
27
11
0
0
Figure 14-3. DMAroute Register
MCF5253 Reference Manual, Rev. 1
[31:24]
26
10
0
0
DMA3REQ (7:0)
DMA2REQ (7:0)
DMA1REQ (7:0)
DMA0REQ (7:0)
25
Field Name
0
9
0
NOTE
DMAROUTE - Request source control
24
0
0
8
[23:16]
23
0
7
0
22
0
6
0
Table
DMA Channel
21
0
5
0
DMA3
DMA2
DMA1
DMA0
14-1.
[15:8]
DMA2REQ
DMA0REQ
20
0
4
0
19
0
3
0
Freescale Semiconductor
Access: User read/write
18
0
2
0
[7:0]
17
0
0
1
16
0
0
0

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