MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 606

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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Universal Serial Bus Interface
24.11.5.2 Building a Transfer Descriptor
Before a transfer can be executed from the linked list, a dTD must be built to describe the transfer. Use the
following procedure for building dTDs.
Allocate 8-DWord dTD block of memory aligned to 8-DWord boundaries. Example: bit address 4
be equal to ‘00000’.
Write the following fields:
24.11.5.3 Executing A Transfer Descriptor
To safely add a dTD, the DCD must be follow this procedure which will handle the event where the device
controller reaches the end of the dTD list at the same time a new dTD is being added to the end of the list.
Determine whether the link list is empty:
Case 1: Link list is empty
24-144
1. Initialize first 7 DWords to 0.
2. Set the terminate bit to ‘1.’
3. Fill in total bytes with transfer size.
4. Set the interrupt on complete if desired.
5. Initialize the status field with the active bit set to ‘1’ and all remaining status bits set to ‘0.’
6. Fill in buffer pointer page 0 and the current offset to point to the start of the data buffer.
7. Initialize buffer pointer page 1 through page 4 to be one greater than each of the previous buffer
1. Write dQH next pointer AND dQH terminate bit to 0 as a single DWord operation.
2. Clear active and halt bit in dQH (in case set from a previous error).
3. Prime endpoint by writing '1' to correct bit position in ENDPTPRIME.
pointer.
Check DCD driver to see if pipe is empty (internal representation of linked-list should indicate if
any packets are outstanding).
Head Pointer
Completed dTDs
Figure 24-65. Software Link Pointers
MCF5253 Reference Manual, Rev. 1
Endpoint
QH
current
Queued dTDs
next
Tail Pointer
Freescale Semiconductor
0 would

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