MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 302

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Audio Interface Module (AIM)
The IEC958 receiver and transmitter handle the main data audio stream in the same way as the IIS
receivers and transmitters. This is done using the internal Audio Data Bus. Additionally, they support the
IEC958 “C” and “U” channels. IEC958 “C” and “U” channel data is interfaced directly to
memory-mapped registers (22, 26, 27 and 28).
17.2
The registers and register field descriptions are provided in this section for the Audio Interface. These
registers include the following registers: Interrupt Mask and Interrupt Status registers, Serial and Digital
Audio Interface registers, Receive Interface registers, Data Exchange registers, CDROM Block Encoder
and Decoder registers, DMA Configuration registers, Phase Configuration register, and the XTrim register.
17.3
All of the Audio Interface registers listed in
this chapter. They are repeated here as a quick reference.
17-4
Audio Interface Memory Map and Register Definitions
Audio Interface Memory Map
MBAR2 + 0xDC
MBAR2 + 0x1C
MBAR2 + 0xD0
MBAR2 + 0xD4
MBAR2 + 0x3C
MBAR2 + 0x4C
MBAR2 + 0x5C
MBAR2 + 0x10
MBAR2 + 0x14
MBAR2 + 0x18
MBAR2 + 0x20
MBAR2 + 0x24
MBAR2 + 0x28
MBAR2 + 0x30
MBAR2 + 0x34
MBAR2 + 0x38
MBAR2 + 0x40
MBAR2 + 0x44
MBAR2 + 0x48
MBAR2 + 0x50
MBAR2 + 0x54
MBAR2 + 0x58
MBAR2 + 0x60
Address
Table 17-1. Audio Interface Memory Map
EBU 1 Receive C Channel
EBU 2 Receive C Channel
EBU 2 Transmit C Channel
I
I
I
I
EBU 1 configuration
EBU 1 Transmit C Channel
EBU 2 configuration
DataIn Control
Processor data in 1 Left (PDIR1-L)
Processor data in 3 Left (PDIR3-L)
Processor data in 1 Right (PDIR1-R)
MCF5253 Reference Manual, Rev. 1
2
2
2
2
S1 configuration
S 2 configuration
S 3 configuration
S 4 configuration for SCLK4
Table 17-1
Register Name
have already been shown in the various parts of
Bits
Sze
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
Freescale Semiconductor
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R