MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 182

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Chip Select Module
10.4.2.2
The chip select mask registers CSMRx determine the address mask. In addition, they determine what type
of access is allowed for these signals. Each CSMR is a 32-bit read/write control register that physically
resides in the chip select module. With the exception of bit 0 (V-bit), which is initialized to 0 on reset, all
other bits in CSMRx are uninitialized by reset.
10-6
Address MBAR + 0x80 (CSAR0)
31–16
Field
15–0
Reset
Reset
BA
W
W
R
R
MBAR + 0x8C (CSAR1)
MBAR + 0x98 (CSAR2)
MBAR + 0xA4 (CSAR3)
MBAR + 0xB0 (CSAR4)
BA31 BA30 BA29 BA28 BA27 BA26 BA25 BA24 BA23 BA22 BA21 BA20 BA19 BA18 BA17 BA16
The Base Address field defines the base address location of memory dedicated to chip select CS[3:0]. These bits
are compared to bits 31–16 on the internal core address bus to determine if the chip select memory is being
accessed.
Reserved
31
15
–
–
Chip Select Mask Register
30
14
–
–
29
13
–
–
Table 10-3. Chip Select Register (CSARx) Field Descriptions
Figure 10-1. Chip Select Address Register (CSARx)
28
12
–
–
27
11
–
–
MCF5253 Reference Manual, Rev. 1
26
10
–
–
25
–
–
9
Description
24
–
–
8
23
–
–
7
22
–
–
6
21
–
–
5
20
–
–
4
19
–
–
3
Freescale Semiconductor
Access: User read/write
18
–
–
2
17
–
–
1
16
–
–
0