MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 607

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Case 2: Link list is not empty
24.11.5.4 Transfer Completion
After a dTD has been initialized and the associated endpoint primed the device controller will execute the
transfer upon the host-initiated request. The DCD will be notified with a USB interrupt if the Interrupt On
Complete bit was set or alternately, the DCD can poll the endpoint complete register to find when the dTD
had been executed. After a dTD has been executed, DCD can check the status bits to determine success or
failure.
By reading the status fields of the completed dTDs, the DCD can determine if the transfers completed
successfully. Success is determined with the following combination of status bits:
Should any combination other than the one shown above exist, the DCD must take proper action. Transfer
failure mechanisms are indicated in the Device Error Matrix.
In addition to checking the status bit the DCD must read the Transfer Bytes field to determine the actual
bytes transferred. When a transfer is complete, the Total Bytes transferred is by decremented by the actual
bytes transferred. For Transmit packets, a packet is only complete after the actual bytes reaches zero, but
for receive packets, the host may send fewer bytes in the transfer according the USB variable length packet
protocol.
Freescale Semiconductor
1. Add dTD to end of linked list.
2. Read correct prime bit in ENDPTPRIME
3. Set ATDTW bit in USBCMD register to 1.
4. Read correct status bit in ENDPTSTATUS. (store in tmp. variable for later)
5. Read ATDTW bit in USBCMD register.
6. Write ATDTW bit in USBCMD register to '0'.
7. If status bit read in (3) is '1' DONE.
8. If status bit read in (3) is '0' then Goto Case 1: Step 1.
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•
•
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Active = 0
Halted = 0
Transaction Error = 0
Data Buffer Error = 0
If 0 goto 3.
If 1 continue to 6.
Multiple dTD can be completed in a single endpoint complete notification.
After clearing the notification, DCD must search the dTD linked list and
retire all dTDs that have finished (Active bit cleared).
MCF5253 Reference Manual, Rev. 1
CAUTION
—
if 1 DONE.
Universal Serial Bus Interface
24-145